mirror of
https://github.com/pineappleEA/pineapple-src.git
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183 lines
5.3 KiB
C
Executable File
183 lines
5.3 KiB
C
Executable File
/*
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* Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef AVUTIL_AVR32_INTREADWRITE_H
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#define AVUTIL_AVR32_INTREADWRITE_H
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#include <stdint.h>
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#include "config.h"
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#include "libavutil/bswap.h"
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/*
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* AVR32 does not support unaligned memory accesses, except for the AP
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* series which supports unaligned 32-bit loads and stores. 16-bit
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* and 64-bit accesses must be aligned to 16 and 32 bits, respectively.
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* This means we cannot use the byte-swapping load/store instructions
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* here.
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*
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* For 16-bit, 24-bit, and (on UC series) 32-bit loads, we instead use
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* the LDINS.B instruction, which gcc fails to utilise with the
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* generic code. GCC also fails to use plain LD.W and ST.W even for
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* AP processors, so we override the generic code. The 64-bit
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* versions are improved by using our optimised 32-bit functions.
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*/
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#define AV_RL16 AV_RL16
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static av_always_inline uint16_t AV_RL16(const void *p)
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{
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uint16_t v;
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__asm__ ("ld.ub %0, %1 \n\t"
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"ldins.b %0:l, %2 \n\t"
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: "=&r"(v)
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: "m"(*(const uint8_t*)p), "RKs12"(*((const uint8_t*)p+1)));
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return v;
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}
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#define AV_RB16 AV_RB16
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static av_always_inline uint16_t AV_RB16(const void *p)
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{
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uint16_t v;
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__asm__ ("ld.ub %0, %2 \n\t"
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"ldins.b %0:l, %1 \n\t"
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: "=&r"(v)
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: "RKs12"(*(const uint8_t*)p), "m"(*((const uint8_t*)p+1)));
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return v;
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}
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#define AV_RB24 AV_RB24
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static av_always_inline uint32_t AV_RB24(const void *p)
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{
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uint32_t v;
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__asm__ ("ld.ub %0, %3 \n\t"
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"ldins.b %0:l, %2 \n\t"
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"ldins.b %0:u, %1 \n\t"
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: "=&r"(v)
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: "RKs12"(* (const uint8_t*)p),
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"RKs12"(*((const uint8_t*)p+1)),
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"m" (*((const uint8_t*)p+2)));
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return v;
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}
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#define AV_RL24 AV_RL24
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static av_always_inline uint32_t AV_RL24(const void *p)
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{
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uint32_t v;
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__asm__ ("ld.ub %0, %1 \n\t"
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"ldins.b %0:l, %2 \n\t"
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"ldins.b %0:u, %3 \n\t"
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: "=&r"(v)
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: "m" (* (const uint8_t*)p),
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"RKs12"(*((const uint8_t*)p+1)),
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"RKs12"(*((const uint8_t*)p+2)));
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return v;
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}
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#if ARCH_AVR32_AP
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#define AV_RB32 AV_RB32
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static av_always_inline uint32_t AV_RB32(const void *p)
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{
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uint32_t v;
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__asm__ ("ld.w %0, %1" : "=r"(v) : "m"(*(const uint32_t*)p));
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return v;
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}
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#define AV_WB32 AV_WB32
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static av_always_inline void AV_WB32(void *p, uint32_t v)
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{
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__asm__ ("st.w %0, %1" : "=m"(*(uint32_t*)p) : "r"(v));
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}
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/* These two would be defined by generic code, but we need them sooner. */
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#define AV_RL32(p) av_bswap32(AV_RB32(p))
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#define AV_WL32(p, v) AV_WB32(p, av_bswap32(v))
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#define AV_WB64 AV_WB64
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static av_always_inline void AV_WB64(void *p, uint64_t v)
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{
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union { uint64_t v; uint32_t hl[2]; } vv = { v };
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AV_WB32(p, vv.hl[0]);
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AV_WB32((uint32_t*)p+1, vv.hl[1]);
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}
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#define AV_WL64 AV_WL64
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static av_always_inline void AV_WL64(void *p, uint64_t v)
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{
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union { uint64_t v; uint32_t hl[2]; } vv = { v };
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AV_WL32(p, vv.hl[1]);
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AV_WL32((uint32_t*)p+1, vv.hl[0]);
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}
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#else /* ARCH_AVR32_AP */
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#define AV_RB32 AV_RB32
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static av_always_inline uint32_t AV_RB32(const void *p)
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{
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uint32_t v;
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__asm__ ("ld.ub %0, %4 \n\t"
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"ldins.b %0:l, %3 \n\t"
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"ldins.b %0:u, %2 \n\t"
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"ldins.b %0:t, %1 \n\t"
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: "=&r"(v)
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: "RKs12"(* (const uint8_t*)p),
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"RKs12"(*((const uint8_t*)p+1)),
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"RKs12"(*((const uint8_t*)p+2)),
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"m" (*((const uint8_t*)p+3)));
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return v;
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}
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#define AV_RL32 AV_RL32
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static av_always_inline uint32_t AV_RL32(const void *p)
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{
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uint32_t v;
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__asm__ ("ld.ub %0, %1 \n\t"
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"ldins.b %0:l, %2 \n\t"
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"ldins.b %0:u, %3 \n\t"
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"ldins.b %0:t, %4 \n\t"
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: "=&r"(v)
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: "m" (* (const uint8_t*)p),
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"RKs12"(*((const uint8_t*)p+1)),
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"RKs12"(*((const uint8_t*)p+2)),
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"RKs12"(*((const uint8_t*)p+3)));
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return v;
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}
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#endif /* ARCH_AVR32_AP */
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#define AV_RB64 AV_RB64
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static av_always_inline uint64_t AV_RB64(const void *p)
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{
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union { uint64_t v; uint32_t hl[2]; } v;
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v.hl[0] = AV_RB32(p);
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v.hl[1] = AV_RB32((const uint32_t*)p+1);
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return v.v;
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}
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#define AV_RL64 AV_RL64
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static av_always_inline uint64_t AV_RL64(const void *p)
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{
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union { uint64_t v; uint32_t hl[2]; } v;
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v.hl[1] = AV_RL32(p);
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v.hl[0] = AV_RL32((const uint32_t*)p+1);
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return v.v;
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}
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#endif /* AVUTIL_AVR32_INTREADWRITE_H */
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