mirror of
https://github.com/pineappleEA/pineapple-src.git
synced 2024-11-25 17:38:23 -05:00
621 lines
11 KiB
ArmAsm
Executable File
621 lines
11 KiB
ArmAsm
Executable File
#include "x86_arch.h"
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.text
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.hidden OPENSSL_ia32cap_P
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.globl RC4
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.type RC4,@function
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.align 16
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RC4: orq %rsi,%rsi
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jne .Lentry
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retq
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.Lentry:
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pushq %rbx
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pushq %r12
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pushq %r13
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.Lprologue:
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movq %rsi,%r11
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movq %rdx,%r12
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movq %rcx,%r13
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xorq %r10,%r10
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xorq %rcx,%rcx
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leaq 8(%rdi),%rdi
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movb -8(%rdi),%r10b
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movb -4(%rdi),%cl
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cmpl $-1,256(%rdi)
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je .LRC4_CHAR
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movl OPENSSL_ia32cap_P(%rip),%r8d
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xorq %rbx,%rbx
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incb %r10b
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subq %r10,%rbx
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subq %r12,%r13
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movl (%rdi,%r10,4),%eax
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testq $-16,%r11
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jz .Lloop1
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btl $IA32CAP_BIT0_INTEL,%r8d
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jc .Lintel
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andq $7,%rbx
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leaq 1(%r10),%rsi
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jz .Loop8
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subq %rbx,%r11
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.Loop8_warmup:
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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movl %edx,(%rdi,%r10,4)
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addb %dl,%al
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incb %r10b
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movl (%rdi,%rax,4),%edx
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movl (%rdi,%r10,4),%eax
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xorb (%r12),%dl
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movb %dl,(%r13,%r12,1)
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leaq 1(%r12),%r12
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decq %rbx
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jnz .Loop8_warmup
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leaq 1(%r10),%rsi
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jmp .Loop8
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.align 16
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.Loop8:
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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movl 0(%rdi,%rsi,4),%ebx
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rorq $8,%r8
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movl %edx,0(%rdi,%r10,4)
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addb %al,%dl
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movb (%rdi,%rdx,4),%r8b
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addb %bl,%cl
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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movl 4(%rdi,%rsi,4),%eax
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rorq $8,%r8
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movl %edx,4(%rdi,%r10,4)
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addb %bl,%dl
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movb (%rdi,%rdx,4),%r8b
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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movl 8(%rdi,%rsi,4),%ebx
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rorq $8,%r8
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movl %edx,8(%rdi,%r10,4)
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addb %al,%dl
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movb (%rdi,%rdx,4),%r8b
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addb %bl,%cl
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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movl 12(%rdi,%rsi,4),%eax
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rorq $8,%r8
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movl %edx,12(%rdi,%r10,4)
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addb %bl,%dl
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movb (%rdi,%rdx,4),%r8b
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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movl 16(%rdi,%rsi,4),%ebx
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rorq $8,%r8
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movl %edx,16(%rdi,%r10,4)
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addb %al,%dl
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movb (%rdi,%rdx,4),%r8b
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addb %bl,%cl
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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movl 20(%rdi,%rsi,4),%eax
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rorq $8,%r8
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movl %edx,20(%rdi,%r10,4)
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addb %bl,%dl
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movb (%rdi,%rdx,4),%r8b
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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movl 24(%rdi,%rsi,4),%ebx
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rorq $8,%r8
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movl %edx,24(%rdi,%r10,4)
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addb %al,%dl
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movb (%rdi,%rdx,4),%r8b
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addb $8,%sil
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addb %bl,%cl
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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movl -4(%rdi,%rsi,4),%eax
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rorq $8,%r8
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movl %edx,28(%rdi,%r10,4)
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addb %bl,%dl
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movb (%rdi,%rdx,4),%r8b
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addb $8,%r10b
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rorq $8,%r8
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subq $8,%r11
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xorq (%r12),%r8
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movq %r8,(%r13,%r12,1)
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leaq 8(%r12),%r12
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testq $-8,%r11
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jnz .Loop8
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cmpq $0,%r11
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jne .Lloop1
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jmp .Lexit
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.align 16
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.Lintel:
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testq $-32,%r11
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jz .Lloop1
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andq $15,%rbx
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jz .Loop16_is_hot
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subq %rbx,%r11
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.Loop16_warmup:
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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movl %edx,(%rdi,%r10,4)
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addb %dl,%al
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incb %r10b
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movl (%rdi,%rax,4),%edx
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movl (%rdi,%r10,4),%eax
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xorb (%r12),%dl
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movb %dl,(%r13,%r12,1)
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leaq 1(%r12),%r12
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decq %rbx
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jnz .Loop16_warmup
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movq %rcx,%rbx
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xorq %rcx,%rcx
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movb %bl,%cl
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.Loop16_is_hot:
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leaq (%rdi,%r10,4),%rsi
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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pxor %xmm0,%xmm0
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 4(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,0(%rsi)
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addb %bl,%cl
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pinsrw $0,(%rdi,%rax,4),%xmm0
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jmp .Loop16_enter
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.align 16
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.Loop16:
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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pxor %xmm0,%xmm2
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psllq $8,%xmm1
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pxor %xmm0,%xmm0
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 4(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,0(%rsi)
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pxor %xmm1,%xmm2
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addb %bl,%cl
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pinsrw $0,(%rdi,%rax,4),%xmm0
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movdqu %xmm2,(%r13,%r12,1)
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leaq 16(%r12),%r12
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.Loop16_enter:
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movl (%rdi,%rcx,4),%edx
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pxor %xmm1,%xmm1
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movl %ebx,(%rdi,%rcx,4)
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addb %dl,%bl
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movl 8(%rsi),%eax
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movzbl %bl,%ebx
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movl %edx,4(%rsi)
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addb %al,%cl
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pinsrw $0,(%rdi,%rbx,4),%xmm1
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 12(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,8(%rsi)
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addb %bl,%cl
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pinsrw $1,(%rdi,%rax,4),%xmm0
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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addb %dl,%bl
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movl 16(%rsi),%eax
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movzbl %bl,%ebx
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movl %edx,12(%rsi)
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addb %al,%cl
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pinsrw $1,(%rdi,%rbx,4),%xmm1
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 20(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,16(%rsi)
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addb %bl,%cl
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pinsrw $2,(%rdi,%rax,4),%xmm0
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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addb %dl,%bl
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movl 24(%rsi),%eax
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movzbl %bl,%ebx
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movl %edx,20(%rsi)
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addb %al,%cl
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pinsrw $2,(%rdi,%rbx,4),%xmm1
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 28(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,24(%rsi)
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addb %bl,%cl
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pinsrw $3,(%rdi,%rax,4),%xmm0
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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addb %dl,%bl
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movl 32(%rsi),%eax
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movzbl %bl,%ebx
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movl %edx,28(%rsi)
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addb %al,%cl
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pinsrw $3,(%rdi,%rbx,4),%xmm1
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 36(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,32(%rsi)
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addb %bl,%cl
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pinsrw $4,(%rdi,%rax,4),%xmm0
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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addb %dl,%bl
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movl 40(%rsi),%eax
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movzbl %bl,%ebx
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movl %edx,36(%rsi)
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addb %al,%cl
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pinsrw $4,(%rdi,%rbx,4),%xmm1
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 44(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,40(%rsi)
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addb %bl,%cl
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pinsrw $5,(%rdi,%rax,4),%xmm0
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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addb %dl,%bl
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movl 48(%rsi),%eax
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movzbl %bl,%ebx
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movl %edx,44(%rsi)
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addb %al,%cl
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pinsrw $5,(%rdi,%rbx,4),%xmm1
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 52(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,48(%rsi)
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addb %bl,%cl
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pinsrw $6,(%rdi,%rax,4),%xmm0
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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addb %dl,%bl
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movl 56(%rsi),%eax
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movzbl %bl,%ebx
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movl %edx,52(%rsi)
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addb %al,%cl
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pinsrw $6,(%rdi,%rbx,4),%xmm1
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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addb %dl,%al
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movl 60(%rsi),%ebx
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movzbl %al,%eax
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movl %edx,56(%rsi)
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addb %bl,%cl
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pinsrw $7,(%rdi,%rax,4),%xmm0
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addb $16,%r10b
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movdqu (%r12),%xmm2
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movl (%rdi,%rcx,4),%edx
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movl %ebx,(%rdi,%rcx,4)
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addb %dl,%bl
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movzbl %bl,%ebx
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movl %edx,60(%rsi)
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leaq (%rdi,%r10,4),%rsi
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pinsrw $7,(%rdi,%rbx,4),%xmm1
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movl (%rsi),%eax
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movq %rcx,%rbx
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xorq %rcx,%rcx
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subq $16,%r11
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movb %bl,%cl
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testq $-16,%r11
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jnz .Loop16
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psllq $8,%xmm1
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pxor %xmm0,%xmm2
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pxor %xmm1,%xmm2
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movdqu %xmm2,(%r13,%r12,1)
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leaq 16(%r12),%r12
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cmpq $0,%r11
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jne .Lloop1
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jmp .Lexit
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.align 16
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.Lloop1:
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addb %al,%cl
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movl (%rdi,%rcx,4),%edx
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movl %eax,(%rdi,%rcx,4)
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movl %edx,(%rdi,%r10,4)
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addb %dl,%al
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incb %r10b
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movl (%rdi,%rax,4),%edx
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movl (%rdi,%r10,4),%eax
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xorb (%r12),%dl
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movb %dl,(%r13,%r12,1)
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leaq 1(%r12),%r12
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decq %r11
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jnz .Lloop1
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jmp .Lexit
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.align 16
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.LRC4_CHAR:
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addb $1,%r10b
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movzbl (%rdi,%r10,1),%eax
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testq $-8,%r11
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jz .Lcloop1
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jmp .Lcloop8
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.align 16
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.Lcloop8:
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movl (%r12),%r8d
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movl 4(%r12),%r9d
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addb %al,%cl
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leaq 1(%r10),%rsi
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movzbl (%rdi,%rcx,1),%edx
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movzbl %sil,%esi
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movzbl (%rdi,%rsi,1),%ebx
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movb %al,(%rdi,%rcx,1)
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cmpq %rsi,%rcx
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movb %dl,(%rdi,%r10,1)
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jne .Lcmov0
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movq %rax,%rbx
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.Lcmov0:
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addb %al,%dl
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xorb (%rdi,%rdx,1),%r8b
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rorl $8,%r8d
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addb %bl,%cl
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leaq 1(%rsi),%r10
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movzbl (%rdi,%rcx,1),%edx
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movzbl %r10b,%r10d
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movzbl (%rdi,%r10,1),%eax
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movb %bl,(%rdi,%rcx,1)
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cmpq %r10,%rcx
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movb %dl,(%rdi,%rsi,1)
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jne .Lcmov1
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movq %rbx,%rax
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.Lcmov1:
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addb %bl,%dl
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xorb (%rdi,%rdx,1),%r8b
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rorl $8,%r8d
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addb %al,%cl
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leaq 1(%r10),%rsi
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movzbl (%rdi,%rcx,1),%edx
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movzbl %sil,%esi
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movzbl (%rdi,%rsi,1),%ebx
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movb %al,(%rdi,%rcx,1)
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cmpq %rsi,%rcx
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movb %dl,(%rdi,%r10,1)
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jne .Lcmov2
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movq %rax,%rbx
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.Lcmov2:
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addb %al,%dl
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xorb (%rdi,%rdx,1),%r8b
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rorl $8,%r8d
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addb %bl,%cl
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leaq 1(%rsi),%r10
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movzbl (%rdi,%rcx,1),%edx
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movzbl %r10b,%r10d
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movzbl (%rdi,%r10,1),%eax
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movb %bl,(%rdi,%rcx,1)
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cmpq %r10,%rcx
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movb %dl,(%rdi,%rsi,1)
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jne .Lcmov3
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movq %rbx,%rax
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.Lcmov3:
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addb %bl,%dl
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xorb (%rdi,%rdx,1),%r8b
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rorl $8,%r8d
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addb %al,%cl
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leaq 1(%r10),%rsi
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movzbl (%rdi,%rcx,1),%edx
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movzbl %sil,%esi
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movzbl (%rdi,%rsi,1),%ebx
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movb %al,(%rdi,%rcx,1)
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cmpq %rsi,%rcx
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movb %dl,(%rdi,%r10,1)
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jne .Lcmov4
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movq %rax,%rbx
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.Lcmov4:
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addb %al,%dl
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xorb (%rdi,%rdx,1),%r9b
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rorl $8,%r9d
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addb %bl,%cl
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leaq 1(%rsi),%r10
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movzbl (%rdi,%rcx,1),%edx
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movzbl %r10b,%r10d
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movzbl (%rdi,%r10,1),%eax
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movb %bl,(%rdi,%rcx,1)
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cmpq %r10,%rcx
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movb %dl,(%rdi,%rsi,1)
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jne .Lcmov5
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movq %rbx,%rax
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.Lcmov5:
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addb %bl,%dl
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xorb (%rdi,%rdx,1),%r9b
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rorl $8,%r9d
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addb %al,%cl
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leaq 1(%r10),%rsi
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movzbl (%rdi,%rcx,1),%edx
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movzbl %sil,%esi
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movzbl (%rdi,%rsi,1),%ebx
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movb %al,(%rdi,%rcx,1)
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cmpq %rsi,%rcx
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movb %dl,(%rdi,%r10,1)
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jne .Lcmov6
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movq %rax,%rbx
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.Lcmov6:
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addb %al,%dl
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xorb (%rdi,%rdx,1),%r9b
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rorl $8,%r9d
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addb %bl,%cl
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leaq 1(%rsi),%r10
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|
movzbl (%rdi,%rcx,1),%edx
|
|
movzbl %r10b,%r10d
|
|
movzbl (%rdi,%r10,1),%eax
|
|
movb %bl,(%rdi,%rcx,1)
|
|
cmpq %r10,%rcx
|
|
movb %dl,(%rdi,%rsi,1)
|
|
jne .Lcmov7
|
|
movq %rbx,%rax
|
|
.Lcmov7:
|
|
addb %bl,%dl
|
|
xorb (%rdi,%rdx,1),%r9b
|
|
rorl $8,%r9d
|
|
leaq -8(%r11),%r11
|
|
movl %r8d,(%r13)
|
|
leaq 8(%r12),%r12
|
|
movl %r9d,4(%r13)
|
|
leaq 8(%r13),%r13
|
|
|
|
testq $-8,%r11
|
|
jnz .Lcloop8
|
|
cmpq $0,%r11
|
|
jne .Lcloop1
|
|
jmp .Lexit
|
|
.align 16
|
|
.Lcloop1:
|
|
addb %al,%cl
|
|
movzbl %cl,%ecx
|
|
movzbl (%rdi,%rcx,1),%edx
|
|
movb %al,(%rdi,%rcx,1)
|
|
movb %dl,(%rdi,%r10,1)
|
|
addb %al,%dl
|
|
addb $1,%r10b
|
|
movzbl %dl,%edx
|
|
movzbl %r10b,%r10d
|
|
movzbl (%rdi,%rdx,1),%edx
|
|
movzbl (%rdi,%r10,1),%eax
|
|
xorb (%r12),%dl
|
|
leaq 1(%r12),%r12
|
|
movb %dl,(%r13)
|
|
leaq 1(%r13),%r13
|
|
subq $1,%r11
|
|
jnz .Lcloop1
|
|
jmp .Lexit
|
|
|
|
.align 16
|
|
.Lexit:
|
|
subb $1,%r10b
|
|
movl %r10d,-8(%rdi)
|
|
movl %ecx,-4(%rdi)
|
|
|
|
movq (%rsp),%r13
|
|
movq 8(%rsp),%r12
|
|
movq 16(%rsp),%rbx
|
|
addq $24,%rsp
|
|
.Lepilogue:
|
|
retq
|
|
.size RC4,.-RC4
|
|
.globl RC4_set_key
|
|
.type RC4_set_key,@function
|
|
.align 16
|
|
RC4_set_key:
|
|
leaq 8(%rdi),%rdi
|
|
leaq (%rdx,%rsi,1),%rdx
|
|
negq %rsi
|
|
movq %rsi,%rcx
|
|
xorl %eax,%eax
|
|
xorq %r9,%r9
|
|
xorq %r10,%r10
|
|
xorq %r11,%r11
|
|
|
|
movl OPENSSL_ia32cap_P(%rip),%r8d
|
|
btl $IA32CAP_BIT0_INTELP4,%r8d
|
|
jc .Lc1stloop
|
|
jmp .Lw1stloop
|
|
|
|
.align 16
|
|
.Lw1stloop:
|
|
movl %eax,(%rdi,%rax,4)
|
|
addb $1,%al
|
|
jnc .Lw1stloop
|
|
|
|
xorq %r9,%r9
|
|
xorq %r8,%r8
|
|
.align 16
|
|
.Lw2ndloop:
|
|
movl (%rdi,%r9,4),%r10d
|
|
addb (%rdx,%rsi,1),%r8b
|
|
addb %r10b,%r8b
|
|
addq $1,%rsi
|
|
movl (%rdi,%r8,4),%r11d
|
|
cmovzq %rcx,%rsi
|
|
movl %r10d,(%rdi,%r8,4)
|
|
movl %r11d,(%rdi,%r9,4)
|
|
addb $1,%r9b
|
|
jnc .Lw2ndloop
|
|
jmp .Lexit_key
|
|
|
|
.align 16
|
|
.Lc1stloop:
|
|
movb %al,(%rdi,%rax,1)
|
|
addb $1,%al
|
|
jnc .Lc1stloop
|
|
|
|
xorq %r9,%r9
|
|
xorq %r8,%r8
|
|
.align 16
|
|
.Lc2ndloop:
|
|
movb (%rdi,%r9,1),%r10b
|
|
addb (%rdx,%rsi,1),%r8b
|
|
addb %r10b,%r8b
|
|
addq $1,%rsi
|
|
movb (%rdi,%r8,1),%r11b
|
|
jnz .Lcnowrap
|
|
movq %rcx,%rsi
|
|
.Lcnowrap:
|
|
movb %r10b,(%rdi,%r8,1)
|
|
movb %r11b,(%rdi,%r9,1)
|
|
addb $1,%r9b
|
|
jnc .Lc2ndloop
|
|
movl $-1,256(%rdi)
|
|
|
|
.align 16
|
|
.Lexit_key:
|
|
xorl %eax,%eax
|
|
movl %eax,-8(%rdi)
|
|
movl %eax,-4(%rdi)
|
|
retq
|
|
.size RC4_set_key,.-RC4_set_key
|
|
|
|
.globl RC4_options
|
|
.type RC4_options,@function
|
|
.align 16
|
|
RC4_options:
|
|
leaq .Lopts(%rip),%rax
|
|
movl OPENSSL_ia32cap_P(%rip),%edx
|
|
btl $IA32CAP_BIT0_INTELP4,%edx
|
|
jc .L8xchar
|
|
btl $IA32CAP_BIT0_INTEL,%edx
|
|
jnc .Ldone
|
|
addq $25,%rax
|
|
retq
|
|
.L8xchar:
|
|
addq $12,%rax
|
|
.Ldone:
|
|
retq
|
|
.align 64
|
|
.Lopts:
|
|
.byte 114,99,52,40,56,120,44,105,110,116,41,0
|
|
.byte 114,99,52,40,56,120,44,99,104,97,114,41,0
|
|
.byte 114,99,52,40,49,54,120,44,105,110,116,41,0
|
|
.byte 82,67,52,32,102,111,114,32,120,56,54,95,54,52,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121,32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46,111,114,103,62,0
|
|
.align 64
|
|
.size RC4_options,.-RC4_options
|
|
#if defined(HAVE_GNU_STACK)
|
|
.section .note.GNU-stack,"",%progbits
|
|
#endif
|